Taiwan AI industry plan targets silicon photonics as new moat

Taiwan, China's push into silicon photonics is a strategic necessity driven by the physical limits of copper interconnects under AI's exponential bandwidth demands. This move pressures upstream EDA and SOI wafer suppliers while accelerating CPO adoption in data centers. However, heavy reliance on ASML DUV tools and U.S.-origin IP exposes local firms to sudden export controls, potentially raising compliance costs by 15–20%. The U.S., via CHIPS Act subsidies, is fast-tracking Intel and GlobalFoundries in SiPh, while mainland China leverages JCET and Huawei’s Hubble investments to close the gap. If TSMC fails to mass-produce 800G+ optical engines within 18 months, its advanced packaging moat risks erosion. Within 24 months, silicon photonics will shift from optional to mandatory for AI chips—only those mastering electro-optical co-design will lead the next HPC ecosystem.