Synopsys to cut chip fab manufacturing control software in shift to AI design, sources say - CNA

U.S. semiconductor design leader Synopsys plans to discontinue a suite of manufacturing process control software widely used by global chipmakers, shifting focus toward higher-margin AI design offerin... Read original →

Synopsys’ exit from fab control software signals a strategic pivot from broad EDA coverage to high-margin AI-driven design. Technically, discontinuing EES and FDC forces foundries like Samsung and SK Hynix to accelerate in-house alternatives—critical at sub-3nm nodes where real-time anomaly detection directly impacts yield ramp speed. Geopolitically, tightening U.S. export controls on advanced manufacturing tools elevate supply chain risks, pushing East Asian fabs toward localized production software stacks. Competitively, Applied Materials, ASML, and even Ansys (now under Synopsys) may fill the void with integrated monitoring or multi-physics simulation layers, while Korean vendors like BISTel gain leverage. Over the next 18 months, the true test lies in closing the design-manufacturing feedback loop: without seamless data flow from AI-generated design constraints to fab execution, advanced packaging and chiplet scaling could stall. Synopsys is betting the war will be won in algorithms, not fabs—but that gap may become its biggest vulnerability.