Synopsys Advances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes at SAFE Forum 2026 - Synopsys

At the 2026 Samsung Advanced Foundry Ecosystem (SAFE) Forum, Synopsys announced a new collaboration with Samsung Electronics focused on advancing power and performance for AI and multi-die designs on ... Read original →

The Synopsys–Samsung Foundry alliance on DTCO at 3nm and beyond is triggering a cascade across the EDA stack, IP ecosystem, and silicon validation. AI-driven automation compresses design cycles but demands tighter co-optimization from EUV equipment and materials suppliers. Geopolitically, this partnership offers a non-U.S.-centric advanced-node alternative—yet raises compliance costs for customers in Taiwan, China and Hong Kong, China if U.S. export controls expand to multi-die integration tech. Competitors like Cadence will likely accelerate joint AI-EDA initiatives with TSMC, while ASML may bundle High-NA EUV tools with EDA data loops. Within 18 months, design service firms with silicon-proven heterogeneous integration capabilities will command premium pricing, while smaller IP vendors lacking DTCO fluency face obsolescence.