Synopsys Advances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes at SAFE Forum 2026 - Morningstar

At the 2026 Samsung Advanced Foundry Ecosystem (SAFE) Forum, Synopsys announced significant advancements in collaboration with Samsung Foundry, focusing on enhancing power, performance, and area (PPA)... Read original →

The Synopsys–Samsung Foundry alliance on 2nm and multi-die integration is triggering a structural overhaul of the EDA stack. AI-native design flows are compressing PPA cycles while forcing upstream IP vendors to accelerate compatibility validation and downstream HPC clients to redesign packaging for hybrid copper bonding. Geopolitically, this bolsters non-U.S. advanced-node autonomy but raises compliance costs for Taiwan, China and mainland China fabs under EUV export controls. Cadence may counter by deepening its Intel IFS partnership with alternative 3D stacking, while ASML could accelerate High-NA EUV rollout to retain equipment leverage. Within 18 months, AI-driven EDA will become a moat for top-tier players—excluding smaller design houses from the 2nm race unless they integrate into these closed-loop ecosystems.