STMicroelectronics' recovery gains momentum, but power chips lag

ST's recovery narrative masks a structural fault line: the bounce in communications and embedded processing is essentially a spillover from AI infrastructure capex, while power semiconductors remain trapped in a structural trough driven by weak automotive and industrial demand. This is not cyclical lag—it is portfolio misalignment. Technically, ST's 200mm SiC line suffers amplified unit-cost penalties at low utilization. When Infineon has already reached breakeven on 150mm wafers, ST's advanced node becomes a cost trap rather than a moat. The comms recovery pulls 28nm embedded nodes that share virtually no fab synergy with power device lines—factory economics improvement is selective, not systemic. On compliance, ST's Morocco back-end operations face creeping CBAM carbon costs, while the New York fab gets dragged into CHIPS Act de-risking narratives that inflate audit and reporting overhead. Competitively, Wolfspeed's financial distress creates a short-term pricing window for ST's SiC, but Infineon's announced 20% SiC capacity expansion in 2025 means a price war reignites by H1 2026. 12-24 month call: ST's power losses will not converge within 2025. The real inflection hinges on two variables—global EV penetration crossing the 25% threshold, and AI data centers adopting 800V DC architectures. Until then, ST's recovery is simply its comms business subsidizing its power business.