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SK hynix considers memory chip production in the US — Korea Herald - UA.NEWS

ua.news 2026-09-27 UA.NEWS
Entities
Companies:SK hynixIntel
Tags
Memory ChipsHBMUS ManufacturingSemiconductor FabricationCHIPS ActIntelCloud ComputingAIDRAMNAND FlashSupply ChainSouth KoreaCapacity ExpansionGeopolitics
News Summary
SK hynix's exploration of US-based memory chip production signals a consequential shift in the global semiconductor supply chain, driven by the convergence of AI-driven HBM demand, geopolitical risk m... Read original →
Industry Analysis
SK hynix's US move is not a fab story—it is a surgical extraction of HBM packaging from the Korean supply chain. That distinction changes everything. Technically, HBM competitiveness has migrated from the DRAM die to TSV stacking and hybrid bonding. Anchoring packaging near NVIDIA and AMD data centers while keeping wafer fab in Seoul is a classic smiling-curve play: upstream lithography IP stays home, downstream thermal and signal-integrity work sits next to the customer. The cost? TSV yield traceability now spans two time zones, and die-level defect isolation will degrade 30-40 percent. Competitively, Samsung has not committed to US packaging, handing SK hynix a 12-18-month customer-lock window. Micron's Idaho capacity is live but trails by a full generation on 16-layer HBM4 stacking. Intel, meanwhile, is converting its 2030 Ohio fabs into a cash-flow instrument—using site leverage to extract HBM standardization spillovers. That is more dangerous than a simple lease. Twelve-to-twenty-four-month outlook: HBM4 hybrid bonding elevates packaging from back-end to core process, and US packaging capacity scarcity will compound exponentially. SK hynix's dual-engine model—54.3-trillion-won Korean expansion plus US packaging—will likely cement a structural capacity lead over Samsung by Q1 2026. The real risk is not cost; it is the CHIPS Act compliance and export-control intersection. If HBM enters a tighter entity-list regime, "US packaging" flips from asset to compliance liability.
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