Siemens unveils Tessent Silicon Executable - Siemens Newsroom

Siemens isn't shipping another verification tool—it's re-anchoring the entire verification paradigm from simulator approximation to silicon-accurate execution. Tessent's DNA is DFT; extending it into "silicon executable" territory means the verification loop is now swallowing DFT and formal-verification boundaries. Upstream, IP houses (ARM, Synopsys DesignWare) must re-certify their verification collateral. Downstream, foundries in Taiwan, China and South Korea will see compressed tape-out cycles, but PDK lock-in deepens simultaneously. Compliance is the quiet killer. EDA sits at the sharpest edge of US export controls. Siemens, a German entity operating across three jurisdictions, faces BIS entity-list scrutiny and CFIUS review if US-originated algorithms are embedded. For mainland China fabs, this is another "unpurchasable" wall. Competitive response: Cadence's JasperGold and Synopsys's VC SpyGlass have roughly 12 months to field equivalent silicon-execution capabilities or lose leading-node design wins. The 12–24 month tail: chiplet architectures (UCIe, BoW) make cross-die verification the single biggest bottleneck. Whoever cracks "multi-die silicon executable" first captures the next verification supercycle and its pricing power.