Semco moves glass substrates to package-level testing

Semco's push of 100mm glass substrates into customer-chip package-level validation is less a milestone than a countdown. The technical logic is unambiguous: once AI accelerator I/O density crosses the 10,000-pin threshold, ABF organic substrates hit a hard wall on warpage and routing density. Glass's thermal expansion coefficient and dimensional stability stop being a nice-to-have and become the only viable path. Upstream, the supply chain for TGV laser drilling, electroless copper plating, and specialty glass from Corning and AGC is being restructured from scratch. Downstream, packaging spec sheets at NVIDIA, AMD, and custom ASIC houses will be rewritten around glass. On competition, Intel has publicly pegged glass substrates to a 2030 production target, while Unimicron (Taiwan, China) and IBS are tracking. But Semco's head start in customer-chip validation buys a 6-to-12-month commercialization window. The real bottleneck is not process maturity—it is yield. Glass brittleness introduces cutting and handling losses that organic substrate lines have never had to engineer around. Within 18 months, expect two or three second-tier substrate makers to announce comparable milestones, and glass will spill from AI-exclusive into HBM and high-performance computing. By 2027, the advanced packaging substrate landscape is being redrawn: ABF retreats to mid-tier, glass becomes the new default.