Samsung, SK Hynix race to secure EUV tools as ASML warns of shortages

Core thesis: ASML's capacity warning exposes a structural bottleneck in AI compute expansion that the market has systematically underpriced — lithography equipment has shifted from "available" to "allocation-dependent." Technical cascade: DRAM's migration to 1β/1γ nodes makes EUV mandatory, yet ASML's output is simultaneously consumed by TSMC's 2nm logic and Samsung's foundry. HBM4's stacking architecture demands tighter lithography tolerances, consuming 1.5-2x the EUV exposure per wafer versus commodity DRAM. The true constraint sits upstream: Zeiss SMT optics and Cymer light sources carry 18-month lead times — the optical supply chain, not ASML's final assembly, is the chokepoint. Compliance & risk: Under the current export-control regime, EUV allocation carries implicit geopolitical weighting. Micron benefits from domestic-status preference; TSMC's high-ASP logic mix and deep co-development relationship with ASML secure structural priority. Samsung is most exposed — DRAM, foundry, and NAND all compete for the same machine slots, making any allocation shortfall a systemic risk. Market game: As NVIDIA's primary HBM supplier, SK Hynix faces a hard fork if EUV delivery slips: fall back to DUV multi-patterning for HBM4, accepting 3-5pp yield loss and 15-20% cost inflation. Samsung may accelerate its 2nm GAA roadmap to dilute EUV demand, but that further compresses its DRAM lithography window. 12-24 month outlook: EUV will become scarcer than GPUs. ASML's High-NA ramp primarily serves logic, not memory. The real fix is intensified SAQP engineering at both Korean players, pushing 1γ via DUV at a 25%+ per-wafer cost premium. The AI arms race will ultimately bottleneck on a single lens.