Samsung keeps DRAM lead as SK hynix claws back global share in Q3 - Korea JoongAng Daily

Samsung's Q3 DRAM volume lead is a red herring. The real signal is structural: SK hynix's share recovery is powered by HBM3E penetration in AI accelerators, not a conventional DDR5 upcycle. Samsung props up shipment numbers with mature-node output from Xi'an and Wuxi, but per-bit ASP and gross margin have been decoupled by hynix's HBM product mix. Technically, the HBM4 transition from 12-layer to 16-layer TSV stacking makes CoWoS advanced packaging and via yield the binding constraint. If Samsung fails to ramp HBM4 volume by H2 2025, its DRAM leader narrative collapses from a capital-markets story into a commodity-volume story. On compliance, tightening US export controls force Samsung's China fabs toward DDR4/5 positioning, while hynix anchors HBM capacity in Cheongju with CoWoS support in Taiwan, China—carrying a smaller geopolitical exposure in practice. Strategically, Micron will likely accelerate HBM3E qualification in Q4, leveraging third-pole positioning to lift industry pricing power. Samsung's only counter is aggressive HBM4 R&D and P4/P5 capacity release, which will cannibalize NAND and foundry capex. 12-24 month call: AI inference HBM consumption will outpace supply elasticity, creating structural shortage by 2026. DRAM market share as a valuation metric becomes meaningless; the anchor shifts to HBM bit share. Samsung still leaning on conventional DRAM volume will see its semiconductor valuation premium systematically compressed.