Samsung could unseat SK Hynix as HBM leader in 2027

This isn't a Samsung catch-up story. HBM4 structurally resets the value chain from packaging-centric back to DRAM-die-centric. HBM3E rewarded SK Hynix's TSV and hybrid bonding depth; HBM4's 12-16 layer stacks, 2048-bit interface, and 4nm-class base die shift the binding constraint to DRAM wafer throughput and EUV lithography — Samsung's home turf. Technical cascade: The logic-ized base die turns HBM into a memory-plus-foundry hybrid. Samsung's SF4/SF3 lines create an internal synergy no rival replicates. Upstream, BESI and ASMPT TSV equipment orders accelerate; TSMC CoWoS-L capacity tightens further. Compliance exposure: If BIS extends HBM-specific export controls to HBM4, Samsung's Xi'an P4 and SK Hynix's Wuxi fabs face simultaneous disruption. DRAM die supply forced back to Korean domestic lines, adding 15-20% near-term cost. Market dynamics: NVIDIA's 2025-2026 HBM4 qualification window is the real battleground. SK Hynix defends via exclusive allocation; Samsung counters with a bundled base-die-plus-stack TCO play. Micron's 12-layer HBM3E ramp keeps a third pole relevant. 12-24 month tail: 16-layer yield issues will push HBM4 ASP 30-40% above HBM3E. DRAM spot prices stay elevated as HBM cannibalizes capacity. The true inflection is Q3 2026 first HBM4 qualification results — not the 2027 market-share headline.