Samsung brings HBM, logic, and optics together in packaging push

Samsung’s integration of HBM, logic, and silicon photonics isn’t incremental—it’s a direct assault on the physical bottlenecks of AI scaling. This move pressures TSMC to retrofit CoWoS for photonic compatibility and forces SK hynix and Micron to reassess HBM stacking roadmaps amid sub-80% TSV yields. Geopolitically, tightening U.S. CHIPS Act controls on advanced packaging tools could delay Samsung’s ramp if reliant on temporary waivers from Applied Materials or Lam Research. Within 18 months, successful hybrid 2.5D/3D integration would erode GPU vendors’ interconnect sovereignty—potentially undermining proprietary protocols like NVLink. Crucially, once silicon photonics I/O drops below $0.5 per Gb/s, optical interconnects shift from optional to mandatory in data centers, triggering a new capex supercycle.