Industry Analysis
Samsung and SK Hynix showcasing next-gen AI memory on the same trade floor is not a product demo—it's a pricing-power play aimed at NVIDIA and AMD. When GPU utilization is bottlenecked by memory bandwidth, memory makers control the throttle on AI compute.
Technically, HBM4 pushing TSV stacks to 12-16 layers shifts the moat from the DRAM die to advanced packaging yield. ASML's EUV and Applied Materials' bonding tools are direct beneficiaries. If CXL memory pooling materializes, server BOM architecture gets fundamentally rewritten.
On compliance, HBM's advanced packaging overlaps logically with GPU export controls. Should HBM4 land on a restriction list, CoWoS lines in Taiwan, China become a new flashpoint, and the two Korean giants face systemic pressure on their combined 40%+ US revenue exposure.
Competitively, Micron has secured a second-source slot at NVIDIA, but 12-layer stacking yield remains its Achilles' heel. Samsung's high-profile display is fundamentally about proving second-source credibility—executing NVIDIA's supply-chain diversification playbook.
12-24 month outlook: HBM4 volume production lands in 2025Q4-2026Q2. If AI capex growth decelerates from 40% to 20%, memory faces its first "tech upgrade colliding with demand shift" scissors gap. The cyclical-stock valuation is being overwritten by an infrastructure narrative, but whether that survives the 2026 capacity wave depends on how fast workloads migrate from training to inference.
This page displays AI-generated summaries and metadata for research purposes. Original content belongs to the respective publishers.