Rapidus fab roadmap examined — first new leading-edge chipmaker in decades has one Hokkaido fab, a 2027 deadline, and 60 potential customers - Tom's Hardware

Rapidus, Japan's emerging chipmaker, is aiming to re-enter the global leading-edge logic manufacturing space through a single fab in Chitose, Hokkaido. The facility has installed ASML's EUV scanner an... Read original →

Rapidus’s bet on 2nm GAA and single-wafer processing is fundamentally an AI-accelerated yield-learning play against TSMC and Samsung’s scale advantage. This forces EDA and PDK ecosystems to adapt, notably accelerating JSR’s EUV photoresist innovation. Yet, with the Japanese government holding veto power and majority equity, geopolitical risk premiums deter international clients—especially under tightening U.S.-Japan-Netherlands export controls that inflate supply chain redundancy costs. In response, TSMC may fast-track non-Taiwan, China 2nm capacity options for Japanese clients, while Intel could bundle IFS services with Chiplet IP. Without securing at least two mainstream AI chip customers within 12 months, Rapidus’s 2027 ramp risks becoming a tech demo, not a commercial foothold. Its true long-tail impact lies not in wafer output, but in potentially serving as a 'trusted foundry' node for non-U.S.-aligned tech blocs.