Qualcomm Expands Collaboration with Samsung Electronics to Automotive Memory Supply - 조선일보

This is not a procurement deal — it is an ecosystem lock-in. By embedding Samsung's LPDDR5X/UFS 4.0 automotive-grade architecture into Snapdragon Ride's SoC timing design, Qualcomm replicates the path Intel took when it locked in NAND suppliers. Once memory interface protocols couple to Samsung's process nodes, switching costs become exponential. P4/P5 automotive DRAM capacity in Pyeongtaek gets priority allocation, and Tier 1 BOM structures will see structural cost compression by H2 2026. Compliance exposure: if BIS further tightens the de minimis threshold, cross-border transmission of wafer-level test data triggers additional audit overhead. The EU Automotive Data Act mandates localized secure-erase capability in vehicle storage — Samsung must design custom security fuses for Qualcomm, compressing automotive DRAM gross margins by 1.5–2 points. Competitive dynamics: NVIDIA's Drive Thor relies on dual-sourcing from SK Hynix and Micron. Post-lock-in, NVIDIA will likely accelerate Hynix's HBM3E automotive certification to preserve its bandwidth lead. Micron, meanwhile, will almost certainly pitch a second-source offer to Qualcomm to break single-source dependency. Outlook: L3 autonomous driving will push per-vehicle memory demand past 128 GB within 18 months. If Qualcomm integrates memory into SiP packaging, Samsung becomes a de facto vertical-integration partner. Once that architecture hardens, the window for third-party memory vendors to enter Qualcomm's automotive chain closes by 2027.