onsemi Unveils Advanced Semiconductor Packaging to Improve EV Inverter Efficiency - ELE Times

The real story isn't a better chip—it's onsemi shifting the competitive battleground from the wafer to the system. In the SiC era, packaging is becoming the actual moat. Technical ripple: optimizing inverter efficiency at the package level forces a redesign of vehicle thermal-management topologies. Upstream, AMB ceramic substrates and silver-sintering processes see structural demand growth; downstream, reduced need for multi-phase parallel modules directly pressures Infineon's and ST's existing module pricing architecture. Compliance exposure: if advanced-packaging lines remain concentrated in Taiwan, China and Malaysia, the 'US-designed, offshore-manufactured' narrative weakens under escalating geopolitical friction. CHIPS Act subsidies offset some cost, but reliance on Coherent for SiC substrates remains a single-point-of-failure risk. Competitive response: Infineon will likely unveil an integrated device-plus-package play in its next earnings cycle as a defensive counter. ST, locked into Bosch and Continental supply chains, will accelerate co-development to neutralize the packaging gap through customer lock-in. Forward look: within 18 months, 800V platforms cascade into the sub-$25K segment, pushing SiC penetration past 35%. Package thermal resistance and yield will become harder KPIs than on-resistance. If onsemi cements packaging-IP patent barriers by 2026, it replicates Infineon's 2015 IGBT-module market capture.