Industry Analysis
Jensen Huang’s Seoul remarks signal a fundamental revaluation of AI hardware: memory has shifted from a peripheral component to the core bottleneck. Technically, HBM and CXL architectures are forcing co-evolution in silicon photonics, advanced packaging, and high-density connectors—evident in TSMC’s strained CoWoS capacity. On compliance, while U.S.-Japan-Netherlands export controls don’t directly target DRAM/NAND, delayed EUV tool access is extending Micron and SK Hynix’s ramp timelines and inflating capex. Samsung and Western Digital will likely accelerate 3D NAND layer stacking and pursue cross-licensing to defuse IP tensions. Over the next 18 months, memory makers will lock in long-term deals as AI server BOMs see memory costs exceed 40%—making current stock pullbacks a supply-driven mispricing, not a demand inflection.
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