Northrop Grumman says U.S. chip production will quadruple by 2030 under expansion to strengthen defense semiconductor supply chains - Defence Industry Europe

Northrop Grumman's "quadruple by 2030" figure is not a capacity announcement—it is a de-risking roadmap for decoupling defense-grade silicon from the commercial foundry ecosystem. Radiation-hardened radar front-ends, EW processors, and guidance SoCs demand 20-year lifecycle support and ITAR-compliant fabs. This is a fundamentally different species from the 3nm consumer race. The technical ripple is structural: it fractures the foundry landscape. GlobalFoundries' 12/14nm defense nodes and TSMC's (Taiwan, China) specialty processes face head-on competition from CHIPS-Act-subsidized domestic fabs. Upstream, Synopsys and Cadence must maintain parallel radiation-hardened PDKs; packaging shifts toward SiP and 3D stacking for EW arrays. The hidden cost is not capex—it is the "dual-stack" problem. Defense primes now carry two parallel qualification pipelines, doubling NRE. Export controls on advanced packaging equipment (ASML, Applied Materials) create a bottleneck no amount of wafer capacity solves. Strategic counter-moves: RTX and L3Harris will accelerate vertical integration, locking in design IP and process-qualification moats. BAE and Thales push European sovereign alternatives. Within 12–24 months, expect 2–3 defense-specialty fabs breaking ground in Arizona and Georgia. The deeper disruption: AI inference silicon for autonomous platforms creates a new defense-chip category that existing ITAR frameworks cannot classify—forcing a regulatory rewrite.