[News] TSMC CoWoS Supply-Demand Gap Reportedly Seen Narrowing from 20% to 10% by End-2026 - TrendForce

According to multiple media reports, Taiwan Semiconductor Manufacturing Company (TSMC) is gradually alleviating the current supply-demand imbalance in the CoWoS (Chip on Wafer on Substrate) market thr... Read original →

The narrowing of TSMC’s CoWoS supply gap from 20% to 10% isn’t just capacity relief—it signals AI chip competition entering a new phase. Technically, HBM stacks and 3nm logic chips now rigidly depend on 2.5D packaging, while CoPoS’ panel-level approach will reshape materials, substrates, and test ecosystems. Compliance-wise, U.S. CHIPS Act mandates for domestic advanced packaging are forcing TSMC to accelerate Arizona fabs, but export controls delay EUV and inspection tools, inflating costs. Competitively, ASE and Samsung are targeting mid-tier AI chips via OSAT models, while Intel’s Foveros remains hampered by yield issues. Over the next 12–24 months, CoWoS pricing pressure may ease, but post-2027, CoPoS ramp-up will trigger a client-lock-in race—NVIDIA’s early Feynman adoption aims to dominate next-gen AI compute architecture.