[News] Google Marks First 4-TPU Year with 8tx and 8i Max, as 8i Max Doubles HBM Bandwidth to Tackle Memory Wall - TrendForce

Google shipping four TPUs in one year marks a strategic pivot from single-chip iteration to a product-matrix play, directly mirroring NVIDIA's A/H/B cadence. The 8i Max's doubled HBM bandwidth is not a spec bump — it forces a full-stack redesign spanning memory controllers, ICI interconnect, and the XLA compiler. For SK Hynix and Samsung, the HBM3E-to-HBM4 transition window compresses to under 18 months, with yield-ramp pressure intensifying. Supply-chain risk is structural: CoWoS advanced packaging remains concentrated at TSMC in Taiwan, China. While US export controls don't directly target Google's HBM procurement, HBM4 early-production volatility could derail the four-chip-year cadence. Capacity is strategic depth — a lesson validated during the 2023 CoWoS shortage. The competitive threat isn't any single TPU. It's the simultaneous custom-silicon push from Google, Amazon's Trainium, and Microsoft's Maia collectively eroding the one-GPU-to-rule-them-all narrative. NVIDIA will likely counter with B300/GB300 at higher HBM bandwidth, but the customer-lock-in window is narrowing. Over the next 12–24 months, the memory-wall solution shifts from brute-force HBM stacking toward CXL-attached memory pooling and near-memory compute. The 8i Max is a stopgap; the architectural inflection point arrives with TPU v6.