Memory Giants Split Over 4F² DRAM Strategy - Businesskorea

The 4F² DRAM split is not a technical disagreement—it is a generational fracture in risk appetite. Samsung's bet on vertical stacking trades process complexity for density, demanding synchronized breakthroughs in ALD, high-k dielectrics, and EUV lithography. A single yield collapse turns billions in capex into stranded assets. SK Hynix and Micron's caution is not a capability gap; it is a calculated HBM window play. While AI demand has not fully materialized, pushing 1T1C to its trench-capacitor limits sustains cost parity for two to three years. The equipment-layer shock is where the real capital shifts. If 4F² reaches volume production, ALD and hybrid-bonding tool orders will roughly double while conventional etch and CMP utilization drops. ASML, Lam Research, and Tokyo Electron face a structural reweighting of their customer base—a quiet but permanent reallocation. My 12-to-24-month call: Samsung's 2026 production node will hit a yield wall. The industry will experience a route correction, but not a reset. A dual-track regime—4F² alongside an optimized 1T1C—will coexist for at least a full generation. The old DRAM norm of synchronized expansion and synchronized contraction is being permanently broken by architectural divergence. The next memory supercycle will be won not by who scales fastest, but by who manages transition risk best.