Manfred Horstmann: GlobalFoundries Bets on FDX Fusion for Physical AI

GF isn't competing with TSMC at 3nm. It's reframing the question. For Physical AI—humanoid robotics, edge inference, industrial control—the binding constraint has never been density. It's power envelope, analog-mixed-signal integration, and unit cost. Strained-silicon FD-SOI hits all three without a single EUV exposure. Technically, this structurally decouples 7nm-class performance from ASML's EUV monopoly. Downstream, STMicro, NXP, and Infineon finally get a viable path to co-integrate AI inference cores with RF and power management on one die—something FinFET struggles with due to backside access constraints. The strained-silicon mobility boost is the real differentiator: a speed-per-watt play, not a density play. On compliance, the EU Chips Act is funneling billions into local fabs; GF's Dresden and Malta sites become the natural home for European Physical AI silicon, while reduced EUV dependency eliminates a single geopolitical chokepoint in the 7–14nm tier. Market dynamics: TSMC will likely wave this off as marketing. But the real question isn't whether GF beats TSMC—it's whether 3nm is overkill for 80% of edge AI workloads. SMIC's DUV-based 7nm already proved the physics; GF is proving the commercial model. 12–24 month outlook: expect first automotive-grade Physical AI SoCs on FDX Fusion by mid-2027. The good-enough-node thesis will capture real share in the 7–14nm sweet spot, breaking the industry's reflexive assumption that every AI workload demands leading-edge logic.