Lorentz Solution Jointly Presents with NVIDIA on Automated Large-Scale Chip-Level 3D EM Extraction and Sign-off of Ultra-High-Speed Silicon Photonics and IC/3DIC Designs at 2026 TSMC OIP - Yahoo Finance Singapore

Lorentz Solution and NVIDIA jointly presented advanced chip-level 3D electromagnetic (EM) extraction and sign-off technologies at the 2026 TSMC Open Innovation Platform (OIP) forum, focusing on ultra-... Read original →

The joint demonstration by Lorentz and NVIDIA at TSMC's 2026 OIP platform marks a pivotal shift toward full-wave electromagnetic simulation in chip design verification. By overcoming the limitations of traditional RC models, this technology enables S-parameter and terahertz inductance modeling for thousands of ports, directly addressing reliability challenges in AI data centers and silicon photonics. This advancement pressures EDA vendors like Synopsys and Cadence to innovate, while chip designers must integrate verification workflows more tightly. Geopolitical dynamics, especially the U.S.-China tech decoupling, elevate the strategic importance of such self-reliant verification capabilities. Competitors may respond with accelerated tool development or alternative integration strategies. Within the next 12 months, as AI compute demand surges, high-fidelity EM verification will become standard in advanced nodes, triggering a structural realignment in design efficiency and cost structures.