Lam Research launches PLP Center of Excellence, replacing wafers with panels

Lam Research’s PLP Center of Excellence in Salzburg signals a decisive shift from wafer-level to panel-level packaging. This move pressures upstream material suppliers to deliver low-warpage, thermally stable substrates and compels equipment makers to redesign lithography and plating modules for larger form factors. While EU semiconductor subsidies mitigate initial capex risk, export controls could inflate compliance costs for non-U.S. customers. Competitors like Applied Materials and Tokyo Electron will likely accelerate PLP tool validation or acquire niche OSATs for process IP. Within 18 months, PLP will see volume adoption in AI/HPC chips, but yield ramp challenges will delay consumer electronics penetration—creating a bifurcated adoption curve favoring high-end applications first.