Intel expands production of photomasks in California: EUV and High-NA EUV in the focal point - Yahoo Tech

Intel has initiated an expansion of its photomask production facility at the Bowers Campus in Santa Clara, California, to increase domestic manufacturing capabilities. The project includes constructio... Read original →

Intel’s Santa Clara photomask expansion is a strategic move toward technological sovereignty, not just capacity scaling. Technically, integrating in-house multi-beam mask writers (MBMWs) with High-NA EUV slashes mask revision cycles for nodes like 18A/14A, accelerating yield ramp—while rivals like TSMC, reliant on external mask suppliers, face delays due to EUV mask degradation and slow turnarounds. From a compliance standpoint, this bolsters U.S. control over sub-2nm critical inputs but inflates CapEx, as Class-1 cleanrooms and MBMW tools cost significantly more than DUV-era mask lines. In response, TSMC may diversify mask partnerships beyond IMS Nanofabrication or spur localized mask capacity in Japan and South Korea. Over the next 12–24 months, photomasks will become the hidden battleground in advanced logic: mask autonomy equals production tempo control.