Intel CEO Lip-Bu Tan Says China Is “Not That Far Behind” In Chip Manufacturing, Despite US Sanctions Blocking Its Access To EUV Machines - Wccftech

Lip-Bu Tan's remark cuts deeper precisely because it comes from Intel—a company that has itself slipped on leading-edge nodes. When a rival pushes DUV multi-patterning to the 5nm threshold, "not that far behind" is not diplomacy; it is a strategic anxiety leak. The EUV embargo's real damage isn't "can't build"—it's "can't afford to build." DUV multi-patterning inflates 7nm mask layers from roughly 20 to 60+, and every percentage point of yield loss compounds unit cost exponentially. SMIC's N+2 is essentially trading economics for physics, and that ceiling hits hard near 5nm. The upstream cascade: once ASML's High-NA EUV reaches volume production, the DUV camp gets locked into "functional but not commercially viable" territory, fracturing the entire photomask, CMP, and materials iteration cycle. Intel sits in the most awkward position—simultaneously an enforcer of US export controls and a participant in a market representing roughly 30% of global wafer demand. Tan's framing is a signal to Washington: the marginal return on tightening sanctions is diminishing, posing systemic revenue risk to ASML, Applied Materials, and Lam Research in the region. The 12-to-24-month tail: China will not crack EUV, but advanced packaging (2.5D/3D interconnect) and chiplet architectures offer an economic bypass. The real watershed is not the lithography machine—it is whoever first achieves production-grade packaging yield and interconnect density.