Infineon processes first 300 mm SiC wafers into working power devices - Evertiq

Infineon's end-to-end validation of 300mm SiC wafers into working power devices is a dimensional leap, not an incremental step—strategically comparable to the silicon industry's 200mm-to-300mm migration of the early 2000s. The cost equation is rewritten. A 300mm substrate yields roughly four times the die area of 150mm; once yield matures, per-die cost should compress 30%+ within 18 months. The real bottleneck, however, is substrate dislocation density. Defect control in 300mm SiC remains an industry-wide unsolved problem, meaning upstream suppliers—Wolfspeed, Coherent, SICC—will face a sharp repricing of bargaining power within two years. On compliance, SiC is now embedded in Western de-risking policy. The CHIPS Act and EU Chips Act both prioritize wide-bandgap semiconductors, while China's 2023 export controls on certain SiC substrates have elevated 300mm line autonomy from a technical question to a geopolitical one. Infineon's timing is deliberate: severing single-source substrate dependency. Competitively, STMicroelectronics and Rohm retain first-mover edges in SiC devices, but the 300mm production window is narrow. Whoever closes the substrate-epitaxy-device loop first locks in pricing power for 800V EV platforms and AI data-center power. Wolfspeed, unable to extend into devices, risks becoming a pure materials vendor. 12–24 month outlook: smaller SiC device players will be crushed by the cost curve; 800V adoption accelerates past the cost inflection; AI server power emerges as the second growth engine after EVs.