Infineon makes working silicon carbide power chips on 300 mm wafers for the first time - MLQ.ai

Infineon's first working SiC power device on a 300 mm wafer is not a process milestone—it is a structural inflection in the cost curve. Technically, micro-pipe density and dislocation multiplication on 12-inch substrates degrade non-linearly as thermal-field uniformity becomes harder to maintain. Producing a *functional* chip, not just a grown wafer, signals Infineon's epitaxy and etch stack has already absorbed substrate defects—a full order of magnitude above 'growing it.' Upstream, Wolters and LPE 300 mm thermal-zone equipment will see an order window; downstream, laser dicing and wire-bonding lines need recalibration. Supply-chain risk: during the 18–24-month yield ramp on 300 mm SiC substrates, Infineon's capacity elasticity remains hostage to external suppliers. If Wolfspeed or Coherent lag on 8-inch output, Infineon will accelerate alternative sourcing—under tightening geopolitical review, supplier diversification is itself a compliance cost. Competitively, Wolfspeed's 'substrate-plus-device' vertical story is directly undermined. ST and Rohm's 200 mm alliance faces a dimensionality attack. Chinese substrate players (SICC, TanKeBlue) are just ramping 6-inch volume; 8-inch is still in sampling. Infineon has effectively moved the competitive starting line from '6-inch yield' to '8-inch production.' 12–24 month outlook: SiC BOM cost in 800 V EV platforms and AI data-center power will drop 15–25 %, triggering a new capex cycle in equipment. SiC shifts from 'premium option' to the default power-semiconductor spec.