Industry Analysis
The 40V node is not arbitrary—it exposes the structural migration in AI data center power architecture. As bus voltage shifts from 12V to 48V, the 40V MOSFET sits precisely in the intermediate buck stage. Infineon is betting that 48V becomes the de facto standard for AI servers by 2026. Upstream, gate drivers, PCB stack-ups, and liquid-cooling designs must all be re-architected; downstream, this directly determines whether VRMs for B200/MI300X-class accelerators can exceed 95% efficiency within constrained board real estate.
On risk: while 40V Si MOSFETs are not on current export control lists, the "AI infrastructure" end-use label could trigger BIS review expansion at any time. Under the EU Chip Act, depreciation from Dresden and Kiel fabs will hit P&L heavily in 2025–2027, squeezing margins on mid-tier power devices.
Competitively, onsemi's deep VRM integration with NVIDIA and ST's first-mover advantage in data center power create immediate pressure. The more existential threat is GaN: if cost premium drops below the 30% threshold by 2026, the 40V Si window may close within 18 months.
Core thesis: within 24 months, the power delivery network—not the GPU—becomes the primary bottleneck for compute scaling. Power semiconductors are upgrading from commodity components to architecture definers. The 40V Si MOSFET is likely the last mainstream generation of silicon-based power devices in AI servers.
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