IC Coder: Leveraging AI to Solve Chip Verification Pain Points and Seeking Financing - eu.36kr.com

IC Coder, developed by Chengdu Pengye Jiantu Technology, addresses efficiency bottlenecks in chip design and verification through an AI-powered intelligent agent platform. Targeting FPGA and digital I... Read original →

IC Coder’s AI-driven closed-loop verification platform is triggering a structural shift across the EDA stack. Its multi-agent architecture not only slashes RTL-to-verification cycles but forces upstream components—like VCD parsing and waveform analysis—to evolve toward AI-native designs, while downstream FPGA vendors such as ANlogic may integrate its APIs to lock in developer ecosystems. Compliance risks loom large: training chip-specific models on sensitive design data could trigger dual scrutiny under China’s Data Security Law and U.S. BIS export controls on EDA tech, especially when serving clients in Taiwan, China or overseas. In response to Synopsys’ and Cadence’s recent AI-assisted verification tools, Chinese EDA firms will likely counter with lightweight, domain-focused solutions for SMEs. Within 18 months, AI agent platforms will redefine digital IC front-end development from labor-intensive to model-driven, birthing a new IP paradigm—delivering self-verifying, self-iterating intelligent design units that reshape cost structures and talent demands across the industry.