From ISM 1.0 to Semicon 2.0—India's chip subsidy overhaul draws early interest, raises the bar for investors

India's pivot from subsidy-led fab recruitment to a risk-sharing framework signals a policy maturation most observers underestimated. Early commitments landing despite thinner government backing reveals a critical signal: manufacturers are pricing in the 1.4-billion-consumer end market, not chasing one-time grant arbitrage. This recalibrates India's position on the global fab map. Technically, front-loaded capital risk will anchor India firmly in the 28nm-and-above mature-node corridor, carving a differentiated lane alongside Malaysia and Vietnam rather than a head-on collision with Taiwan, China's leading-edge ecosystem. Upstream, equipment OEMs must re-underwrite their India ROI models around longer payback cycles; downstream, domestic automotive and industrial chip loops gain a structural supply hedge. Strategically, CHIPS Act recipients in the US may treat India as a 'second capacity pool' to dilute geographic concentration, while mainland Chinese foundries accelerate their own mature-node substitution. The 18-month watch item is not the headline deal count—it is whether the first fabs clear three infrastructure gates: grid reliability, engineering talent depth, and IP enforcement. That, not the subsidy quantum, is the real stress test of Semicon 2.0.