Energy use forcing rethink of AI chip design, TSMC says - New Orleans CityBusiness

A senior executive from TSMC, Kevin Zhang, stated at a conference in Amsterdam that rising electricity demands from AI are shifting chip design priorities toward energy efficiency rather than raw comp... Read original →

TSMC’s (Taiwan, China) pivot toward energy efficiency over raw performance signals a paradigm shift in AI chip design. This triggers a cascade: advanced packaging and 3D stacking evolve from enablers to architectural necessities, while photonics accelerates from lab to fab. For NVIDIA, AMD, and hyperscalers, electricity costs now rival wafer expenses, forcing system-level re-architecting. Huawei, barred from ASML’s EUV tools, resorts to chiplet-based workarounds—viable short-term but risking yield instability and ecosystem fragmentation. Geopolitically, ‘green AI’ metrics could become a new export control vector, with the U.S. potentially weaponizing efficiency standards. Within 12–24 months, a clear bifurcation will emerge: firms achieving breakthroughs in compute-per-watt will dictate infrastructure economics, while those clinging to transistor scaling alone face obsolescence.