← Feed Deep Dive Matrix Subscribe

dorsaVi (ASX:DVL) Shares Extend Gains After Key Chip Design Milestone - Kalkine

kalkine.com.au 2026-06-18 Kalkine
Entities
Tags
RRAM technologyCMOS integrationCompute-in-MemoryChip designSemiconductor advancementEdge intelligenceMemory technologyWearable sensorsSensor technologyAI chipsSemiconductor manufacturingChip validation
News Summary
dorsaVi (ASX:DVL) announced the completion of its first integrated RRAM-CMOS validation chip design on June 18, 2026, leading to a 2.50% stock gain to AUD 0.041. Developed in collaboration with NTU Si... Read original →
Industry Analysis
dorsaVi’s validated RRAM-CMOS chip design signals a structural shift in edge AI hardware. By embedding compute-in-memory into a standard 3nm CMOS flow, it directly undermines the power-efficiency economics of conventional SRAM-plus-logic architectures in wearables, forcing EDA vendors to prioritize CIM-aware toolchains. Geopolitically, while co-development with NTU Singapore and ITRI (Taiwan, China) mitigates some export control exposure, reliance on TSMC’s EUV nodes still ties production to U.S.-controlled equipment licensing—posing latent supply chain fragility. Competitors like NVIDIA and Renesas will likely accelerate their own CIM roadmaps, especially targeting industrial robotics and clinical monitoring with defensive IP strategies. Within 18 months, this advancement will catalyze sensor OEMs to pivot from data collection to on-device inference, reshaping value capture in medtech and smart manufacturing.
Read Original Article →
Related
This page displays AI-generated summaries and metadata for research purposes. Original content belongs to the respective publishers.