dorsaVi (ASX:DVL) locks in RRAM-CMOS chip design and the program finally moves to silicon - Stocks Down Under

dorsaVi (ASX:DVL) has completed the full design package for its first integrated RRAM-CMOS validation chip, marking a significant step from roadmap to silicon. Developed in collaboration with NTU Sing... Read original →

dorsaVi’s finalized RRAM-CMOS validation chip design marks a pivotal shift of compute-in-memory from concept to fabrication. This move pressures EDA vendors to enhance NVM modeling support and nudges foundries like TSMC to refine BEOL integration flows for RRAM. Geopolitically, reliance on ITRI (Taiwan, China) and NTU Singapore sidesteps advanced-node export controls—for now—but scaling to 22nm with potential EUV steps risks U.S. equipment licensing hurdles. Competitors such as Weebit Nano may accelerate partnerships with European IDMs to capture industrial sensor niches. If dorsaVi demonstrates >10x energy efficiency gains within 12–24 months, it could redefine edge-AI architectures; failure invites absorption or obsolescence by vertically integrated giants.