DeepSeek-Huawei chip co-design could shift AI training away from Nvidia

DeepSeek's embedded role in Huawei's chip design is not procurement—it is co-creation. This mirrors the ARM-SoC symbiosis of 2015, where algorithm teams directly shape transistor-level decisions. The structural implication: CUDA's moat on the inference side erodes from the inside. Three supply-chain accelerants follow. First, CANN operator libraries coupling tightly with MoE architectures compresses migration cost from months to weeks. Second, advanced packaging and HBM domestication shifts from "functional" to "competitive." Third, EDA autonomy at 7nm closes the loop. On compliance, the entity list cannot block architecture-over-process substitution. Chiplet-based large-die designs offset lithography constraints, while sparse-model architectures reduce peak-FLOPS dependency—algorithmic efficiency as a deliberate hedge against process-generation gaps. Nvidia's most probable counter: accelerate H20 iterations to lock in legacy customers, weaponizing cost-performance against the self-reliance narrative. But the window is roughly 18 months. Once domestic clusters clear 10K-GPU training benchmarks, switching costs become exponential. 12-24 month outlook: China's AI compute market bifurcates into a hardened dual-track system. Nvidia's share slides from 90%+ toward the mid-60s. Model-chip co-design transitions from optional to mandatory in domestic procurement.