CXMT targets 4F² DRAM production two years ahead of Samsung, but can China close technology gap?

Core judgment: CXMT's 4F² timeline is a strategic signal, not a technology declaration. Technology chain: 4F² is fundamentally an architectural reconfiguration, not mere scaling. It demands entirely new high-k dielectric stacks and back-end interconnect redesign. Upstream, EUV and ALD equipment remain hard constraints; downstream, HBM TSV density and thermal management must be re-engineered. If CXMT truly mass-produces by end-2026, its DUV multi-patterning or domestic lithography has crossed a critical threshold — more alarming than the node number itself. Compliance risk: BIS export controls cap CXMT's ceiling. Relying on domestic lithography and etching adds 12-18 months to yield ramp versus Korean peers. "Mass production" in China's context typically means ~50K wpm, not Samsung's 200K — that volume gap limits real pricing impact on global DRAM. Market dynamics: Samsung and SK Hynix's moat sits in HBM4 3D stacking and AI ecosystem lock-in, not 4F² commodity. CXMT racing ahead in planar DRAM likely triggers a "cede low-end, defend HBM" strategy from Korean players, using AI storage margins to absorb commodity price wars. Trend call: The real 18-month inflection point is 3D DRAM patent positioning. CXMT's 4F² is planar-process optimization; 3D DRAM is an architectural generation gap. If Korean fabs ship 3D DRAM first in 2027, CXMT's head start evaporates.