Commerce Shifts $955M in GlobalFoundries CHIPS Award to Photonics, Advanced Packaging - ExecutiveGov

Washington's $955M reallocation is not a budget tweak—it is a strategic reframe of the CHIPS Act from transistor manufacturing to system-level integration. The photonics-plus-advanced-packaging intersection targets the single most constrained node in today's AI datacenter stack: CoWoS-class 2.5D/3D interconnect capacity. The technical ripple is immediate. InP laser suppliers, silicon-photonics wafer fabs, ABF substrate makers, and underfill material vendors will see order structures shift as GF builds CPO and hybrid-bonding lines. If GF reaches volume CPO packaging by 2026, NVIDIA and AMD gain a credible non-TSMC interconnect option, directly eroding CoWoS pricing power for the first time. On compliance, the targeted funding model locks GF's roadmap to Commerce Department priorities—less operational flexibility, but a strategic-supplier premium that sidesteps the geopolitical exposure inherent in TSMC's Taiwan, China capacity footprint. ASE and Amkor face near-term margin pressure in advanced packaging; Broadcom and Marvell accelerate localized optical-interconnect deployment. Within 18 months, interconnect power consumption will outpace compute itself, and CPO shifts from optional to mandatory. This $955M is not a subsidy. It is the entry ticket to pricing power in the AI interconnect layer.