Cadence ChipStack AI Super Agent announces Level-5 autonomy - Tech Critter

Cadence and Samsung Foundry have expanded their partnership in second-generation 2nm process technology, advancing AI chip development through broader memory and interface IP, as well as agentic AI de... Read original →

Cadence’s deepened collaboration with Samsung Foundry on 2nm isn’t just a process node upgrade—it triggers a cascade: EDA tools must evolve to support agentic AI design flows, while downstream memory and I/O IP must co-optimize for tighter power budgets. With U.S. export controls tightening around sub-2nm tech, non-U.S. customers face higher compliance costs and forced supply chain diversification. Competitively, Synopsys will accelerate DSO.ai enhancements and deepen TSMC integration, while foundries outside Taiwan, China—like SMIC—will struggle to access equivalent IP stacks, widening the performance gap. Within 18 months, ‘AI-native design + leading-edge nodes’ will become a de facto industry gatekeeper, shifting chip development from labor-intensive to model-intensive paradigms and entrenching ecosystem moats among top-tier players.