Industry Analysis
The jump from 80 to 110+ EUV units by 2028 is not incremental growth—it is a structural re-pricing of lithography as the AI bottleneck. Once Rubin-architecture GPUs push 2nm logic to 70+ EUV passes per wafer, the constraint migrates from assembly throughput to Zeiss SMT optics production. That is the true chokepoint, not ASML's integration lines. Applied Materials' CMP and etch tooling will follow passively.
India's Dholera fab is strategically underpriced in the narrative. This is not a revenue play; it is ASML constructing a jurisdictional firewall. A sovereign customer base anchored to Amazon and Meta's India datacenter buildout sits outside the US-China export-control friction zone entirely. Conversely, CXMT's multi-patterning DUV route toward 17nm DRAM represents a slow-burn erosion of EUV pricing power at mature nodes—a five-to-eight-year structural dilution, not a near-term volume shock.
The competitive vulnerability is customer concentration. JPMorgan's 110-unit model implicitly assumes TSMC and Samsung both ramp 2nm/18A simultaneously. Intel Foundry's capital discipline makes it a wildcard, not a pillar. If either of the "big two" slips, ASML's 2028 backlog loses 15-20% of assumed volume.
The 62% YTD rally has already priced the 2028 bull case. The genuine risk window is Q3-Q4 2026: when hyperscaler AI capex transitions from committed to delivered, any single-quarter miss compresses equipment visibility from twelve months to six, and the beta amplification hits ASML hardest.
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