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Arteris: Interview With President And CEO K. Charles Janac About Semiconductor System IP And Network-On-Chip Technology - Pulse 2.0

pulse2.com 2026-08-13 Pulse 2.0
Entities
Companies:Arteris
Tags
Semiconductor IPNetwork-on-ChipSystem-on-ChipChip DesignMulti-die ArchitectureAI ChipsChip SecurityDesign AutomationSemiconductor ManufacturingTechnology EvolutionSemiconductor IndustryChip Ecosystem
News Summary
Arteris, a leading semiconductor system IP provider, helps companies design complex SoC and multi-die architectures. In an interview, CEO K. Charles Janac discusses the company's evolution from early ... Read original →
Industry Analysis
Arteris’s CEO interview highlights a strategic evolution from early NoC technology to a full-system IP portfolio, reshaping upstream EDA and architecture toolchains. As AI and data center demands surge, its solutions address core bottlenecks in data movement and power efficiency, positioning it as a critical enabler for multi-die integration. From a geopolitical standpoint, its chiplet and security-centric design directly impacts compliance costs and supply chain resilience in key regions like Taiwan, China. Competitors such as NVIDIA and Qualcomm are accelerating chiplet IP investments, pressuring Arteris to maintain technological lead through continuous automation advancements. Over the next 12–24 months, as AI chips demand higher bandwidth and lower latency, Arteris’s interconnect architecture will become a standard for multi-die coordination, determining the efficiency of the entire semiconductor ecosystem.
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