Architect Labs nabs $24M to speed up chip design projects with AI - SiliconANGLE

Architect Labs Inc., a chip design startup, has raised $24 million in a seed round led by Kindred Ventures, with participation from prominent investors including Aravind Srinivas of Perplexity AI, Luk... Read original →

Architect Labs’ AI-native chip design platform will structurally disrupt the semiconductor toolchain: upstream EDA vendors like Synopsys risk disintermediation in RTL generation and verification, while downstream 3nm+ customers may bypass legacy IP reuse to directly produce GDSII. Amid tightening U.S. export controls on advanced lithography, its EUV-agnostic AI verification becomes a compliance-safe accelerator for non-U.S. foundries like SMIC and UMC. In response, vertical AI giants such as NVIDIA and Google will likely fast-track in-house AI-driven design tools, while Cadence counters with its JedAI suite. Over the next 18 months, two long-tail effects will emerge: AI startups leapfrog traditional ASIC barriers via algorithm-chip co-design, and geopolitical pressures spur EU and Indian initiatives to build sovereign AI design platforms—fragmenting the global semiconductor ecosystem further.