Applied Materials CEO: AI reshapes semiconductor innovation

AI-driven compute demand is forcing a paradigm shift in semiconductor manufacturing. Technically, advanced packaging and heterogeneous integration have become essential—not optional—to sustain Moore’s Law, accelerating innovation in materials (e.g., high-k metal gates, cobalt interconnects) and multi-patterning EUV processes. Compliance risks are mounting: tightening U.S. export controls and the EU Chips Act’s localization mandates compel equipment makers to build redundant global capacity, inflating operational costs by 15–20%. Competitive dynamics are intensifying—ASML may leverage High-NA EUV to cement lithography dominance, while Lam Research and Tokyo Electron engage in close combat over atomic layer deposition and dry etch. Over the next 18 months, capex will pivot toward back-end processes, spiking demand for test and packaging tools. Crucially, power efficiency emerges as the new KPI, making low-power materials and 3D stacking central to technology roadmaps—a clear ‘AI-defined manufacturing’ tailwind.