Industry Analysis
Lisa Su's capacity expansion signal is less about wafer starts and more about a structural shift: the AI compute bottleneck has migrated from architecture to advanced packaging and HBM allocation. AMD's deepening of its China-Taiwan supply chain commitment is a preemptive lock on CoWoS capacity and HBM supply—resources that will remain scarce through 2026. Strategically, this pressures NVIDIA's existing TSMC priority and forces Intel Foundry to accelerate 18A yield to capture spillover demand. The CHIPS Act subsidy logic is pivoting from 'build fabs' to 'lock capacity,' raising switching costs industry-wide while concentrating geographic risk in a single manufacturing node. Within 18-24 months, the competitive narrative in AI silicon will shift from 'whose architecture wins' to 'who has secured the most silicon.' HBM suppliers—SK Hynix and Samsung—will hold pricing power for the first time over logic chip designers, fundamentally rewriting the value chain hierarchy and making memory the new gatekeeper of AI infrastructure.
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