AI energy demand drives a shift to vertical power delivery and smaller modules - digitimes

As global AI demand accelerates, power consumption challenges in AI computing infrastructure have emerged as a critical industry focus. At Computex in Taipei, industry leaders highlighted that traditi... Read original →

The AI compute arms race is thrusting power delivery architecture to the forefront of semiconductor innovation. Conventional lateral power schemes buckle under NVIDIA’s GB200-class chips, forcing a pivot to vertical power delivery (VPD) and miniaturized modules. This shift compels Texas Instruments to overhaul its analog roadmap and pressures TSMC to embed power management units into advanced packages like CoWoS-L. The ripple effect now reaches substrate materials, test equipment, and EDA flows—power integrity simulation has become non-negotiable. Geopolitically, U.S. CHIPS Act energy-efficiency mandates could morph into green trade barriers, inflating compliance costs for non-domestic supply chains. TI, leveraging GaN and system-level integration, may gain an edge, while AMD and Intel will likely deepen ties with regional power IC partners. Within 18 months, power efficiency will dominate AI chip procurement criteria, establishing 'efficiency as compute' as the new valuation paradigm and accelerating autonomous power IP ecosystems in Taiwan, China and mainland China.