AI doubles Aker differential oscillator mix; 312.5MHz sample set for 4Q26

The 312.5MHz frequency is no accident—it anchors 100G Ethernet and high-speed SerDes reference clocks. Aker is positioning this product at the intersection of AI interconnect escalation and automotive Ethernet. As GPU links scale from 900G toward 1.8T, phase jitter in the reference oscillator becomes the hard ceiling on bit-error-rate. A Q4 2026 sample window, if it lands inside a design-in cycle, targets the 2027–2028 200G/400G SerDes incremental pool, not legacy replacement. The 51.88% automotive revenue share signals completed migration into AEC-Q100-qualified customer bases. But the real margin engine is AI data centers. When AI demand doubles the differential oscillator mix, the same die serves both GPU interconnect and in-vehicle Ethernet—amortizing automotive qualification costs across two end-markets. That is a textbook cost-structure play. Competitively, SiTime holds roughly 40% of the MEMS oscillator segment with deep IP-level lock-in at Broadcom and Marvell. Aker's only viable path is attacking the 100G+ reference clock niche directly. The window is narrow: by Q2 2027 it must secure design wins at two Tier-1 switch-chip vendors, or SiTime's ecosystem moat seals the door. Outlook: as AI clusters scale from 8-GPU to 256-GPU, per-GPU clock demand grows exponentially. The 312.5MHz oscillator is transitioning from commodity component to bottleneck item—locking in reference-clock supply means locking in the BOM of next-gen AI switch silicon.