AI Data Centers Push Silicon Photonics Toward 300-mm Scale

As AI clusters expand from rack-level to row-level accelerators, data movement is becoming as critical as compute itself. Silicon photonics emerges as a key enabler for high-bandwidth, low-loss interc... Read original →

As AI clusters scale beyond rack-level, interconnect bottlenecks are forcing silicon photonics from optional to essential. STMicroelectronics’ push toward 300-mm PIC100 production slashes per-unit costs by over 40% and integrates TSV and die-stacking capabilities critical for CPO/NPO—directly undermining discrete transceiver vendors. This triggers a cascade: OSATs must rapidly adopt hybrid bonding, while EDA tools evolve toward electro-photonic co-simulation. Geopolitically, reliance on advanced-node capacity in Taiwan, China and Israel exposes supply chains to export control risks. In response, Intel and Marvell may divest non-core optical engine units to focus on algorithm-defined hardware. Within 18 months, the industry will shift decisively from pluggable optics to near-package architectures, with foundries mastering wafer-scale photonic integration emerging as ecosystem gatekeepers.