AI data center boom risks squeezing power chip supplies for auto, electronics

This is a power-delivery bottleneck masquerading as a compute problem. The binding constraint isn't GPU wafer starts—it's the SiC MOSFETs and GaN HEMTs converting an 800V DC bus to chip-level rail voltage. Unlike the 2021 digital-chip crisis, power semiconductors carry 18-month AEC-Q101 qualification cycles; you cannot simply ramp capacity to close the gap. Infineon, STMicro, and onsemi control roughly 70% of SiC power devices. If hyperscalers lock 2026-27 capacity via take-or-pay contracts, automotive Tier-1s face a structural supply deficit no spot-market procurement can fix. Expect SiC substrate spot prices to climb 40-60% within 12 months. EV OEMs will be forced into hybrid Si/SiC 800V topologies to dilute BOM cost—a design retreat that erodes efficiency margins. Strategically, NVIDIA and hyperscalers will vertically integrate power delivery, commissioning custom SiC modules and in-house VRM architectures. Infineon and onsemi will bifurcate product lines into "data-center grade" (30-50% premium) versus "automotive grade," effectively rationing supply by customer tier. The 12-24 month tail: this is not a cyclical shortage. Analog qualification is structurally slower than digital, meaning the squeeze persists even after data-center capex normalizes. The winner is whoever owns the power-module-plus-liquid-cooling integration layer—system-level architecture lock-in, not device-level performance, is the new moat.