According to Taiwan media Commercial Times, TSMC's advanced packaging - Shanghai Metals Market

Advanced packaging is no longer a back-end process—it is becoming the pricing anchor of the semiconductor value chain. TSMC elevating CoWoS and SoIC capacity to the same strategic tier as its 2nm node sends a clear signal: once transistor scaling hits physical walls, heterogeneous integration yield and interconnect bandwidth become the true performance ceiling. The technical ripple is immediate. ABF substrates, temporary bonding equipment, and hybrid bonding processes all enter a capex supercycle, repricing the bargaining power of upstream material and equipment suppliers. On the compliance front, US BIS export controls on packaging equipment have structurally raised the cost of production lines in Taiwan, China, while narrowing the window for mainland Chinese OSAT players in 2.5D/3D packaging—equipment denial is a binary constraint, not a speed issue. Competitively, Intel's EMIB and Samsung's I-Cube are essentially 'packaging-as-process-substitute' plays, but customer lock-in remains anchored in TSMC's ecosystem. Over the next 12–24 months, the critical variable is not technological generation but capacity. AI accelerators are consuming CoWoS wafers faster than anyone modeled. Packaging capacity will replace wafer capacity as the scarcest resource in the industry.