SemiQ Gen4 SiC MOSFETs Reduce Resistance and Switching Energy - TimesTech

SemiQ's Gen4 SiC MOSFET compresses both on-resistance and switching loss simultaneously — a signal that the competitive axis in power semiconductors is shifting from single-parameter leadership to system-level cost engineering. The technical ripple is concrete: lower switching energy lets 800V EV inverter designers replace multi-level topologies with simpler two-level architectures, trimming gate-driver ICs and peripheral BOM. Upstream, this accelerates the 8-inch SiC substrate transition; the 6-inch economics window is closing faster than most foundries anticipated. On competition, Infineon and STMicroelectronics hold the car-grade certification moat. SemiQ's real threat isn't the datasheet — it's commoditizing switching loss as a differentiator, dragging the industry into a substrate-yield-and-packaging-cost price war. The 12-to-24-month tail: AI data-center power architectures are migrating from 48V to 800V DC bus, where SiC MOSFETs will collide head-on with GaN at scale. The winner won't be defined by one device's RDS(on), but by vertical integration depth across substrate, epitaxy, die, and module.