dorsaVi Finalises RRAM-CMOS Validation Chip Design for Ultra-Edge AI - TradingView

dorsaVi has completed the design of its first integrated resistive random access memory-complementary metal-oxide semiconductor (RRAM-CMOS) validation chip, marking a significant step forward in ultra... Read original →

dorsaVi’s RRAM-CMOS validation chip—co-developed with NTU Singapore and ITRI (Taiwan, China)—signals that compute-in-memory (CIM) architectures are transitioning from lab curiosity to foundry-ready solutions for ultra-edge AI. By integrating RRAM in BEOL atop standard CMOS wafers without altering transistor stacks, the design sidesteps reliance on EUV or sub-5nm nodes, reducing exposure to U.S.-led export controls. This approach pressures EDA vendors to enhance NVM modeling capabilities and forces edge-AI competitors like Samsung and Intel to accelerate alternative memory commercialization. Within 18 months, successful tape-out could trigger a wave of low-power, local-inference deployments in industrial robotics and exoskeletons, while spurring an RRAM IP licensing ecosystem. Crucially, it validates a geopolitically resilient path to energy-efficient AI at the edge.